Understood. Thanks!
-Original Message-
From: Nikula, Jani
Sent: Monday, September 19, 2016 5:43 PM
To: Lee, Shawn C ; intel-gfx@lists.freedesktop.org
Cc: Lee, Shawn C
Subject: Re: [PATCH] drm/i915 : Restore PWM_GRANULARITY after resume
On Mon, 19 Sep 2016, "Lee, Shawn C" wrote:
> From
On Mon, 19 Sep 2016, "Lee, Shawn C" wrote:
> From: "Lee, Shawn C"
>
> SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
> (minimum increment) of the PWM backlight control counter. PWM frequency
> adjustment on 128 clock increments when this bit was 1. And 16 clock
> increments
From: "Lee, Shawn C"
SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
(minimum increment) of the PWM backlight control counter. PWM frequency
adjustment on 128 clock increments when this bit was 1. And 16 clock
increments when it was 0.
PWM frequency multiple octuple (from 20
On Thu, 08 Sep 2016, "Lee, Shawn C" wrote:
> From: "Lee, Shawn C"
>
> SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
> (minimum increment) of the PWM backlight control counter. PWM frequency
> adjustment on 128 clock increments when this bit was 1. And 16 clock
> increments
From: "Lee, Shawn C"
SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity
(minimum increment) of the PWM backlight control counter. PWM frequency
adjustment on 128 clock increments when this bit was 1. And 16 clock
increments when it was 0.
PWM frequency multiple octuple (from 20
