Re: [Intel-gfx] [PATCH 02/17] drm/i915/dp: Track the pipe and link bpp limits separately

2023-08-18 Thread Imre Deak
On Fri, Aug 18, 2023 at 11:24:26AM +0300, Kandpal, Suraj wrote: > [...] > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h > > > b/drivers/gpu/drm/i915/display/intel_dp.h > > > index 22099de3ca458..a1789419c0d19 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_dp.h > > > +++ b/drivers/

Re: [Intel-gfx] [PATCH 02/17] drm/i915/dp: Track the pipe and link bpp limits separately

2023-08-18 Thread Imre Deak
On Thu, Aug 17, 2023 at 07:27:24PM +0300, Jani Nikula wrote: > On Thu, 17 Aug 2023, Imre Deak wrote: > > A follow-up patch will need to limit the output link bpp both in the > > non-DSC and DSC configuration, so track the pipe and link bpp limits > > separately in the link_config_limits struct. >

Re: [Intel-gfx] [PATCH 02/17] drm/i915/dp: Track the pipe and link bpp limits separately

2023-08-18 Thread Kandpal, Suraj
> > On Thu, 17 Aug 2023, Imre Deak wrote: > > A follow-up patch will need to limit the output link bpp both in the > > non-DSC and DSC configuration, so track the pipe and link bpp limits > > separately in the link_config_limits struct. > > > > Use .4 fixed point format for link bpp matching the

Re: [Intel-gfx] [PATCH 02/17] drm/i915/dp: Track the pipe and link bpp limits separately

2023-08-17 Thread Jani Nikula
On Thu, 17 Aug 2023, Imre Deak wrote: > A follow-up patch will need to limit the output link bpp both in the > non-DSC and DSC configuration, so track the pipe and link bpp limits > separately in the link_config_limits struct. > > Use .4 fixed point format for link bpp matching the 1/16 bpp granul

[Intel-gfx] [PATCH 02/17] drm/i915/dp: Track the pipe and link bpp limits separately

2023-08-17 Thread Imre Deak
A follow-up patch will need to limit the output link bpp both in the non-DSC and DSC configuration, so track the pipe and link bpp limits separately in the link_config_limits struct. Use .4 fixed point format for link bpp matching the 1/16 bpp granularity in DSC mode and for now keep this limit ma