[Intel-gfx] [PATCH 03/12] drm/i915: Simplify VLV drain latency computation

From: Ville Syrjälä The current drain lantency computation relies on hardcoded limits to determine when the to use the low vs. high precision multiplier. Rewrite the code to use a more straightforward approach. Reviewed-by: Jesse Barnes Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/in

Re: [Intel-gfx] [PATCH 03/12] drm/i915: Simplify VLV drain latency computation

On 02/10/2015 05:28 AM, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > The current drain lantency computation relies on hardcoded limits to > determine when the to use the low vs. high precision multiplier. > Rewrite the code to use a more straightforward approach. > > Signed-off

[Intel-gfx] [PATCH 03/12] drm/i915: Simplify VLV drain latency computation

From: Ville Syrjälä The current drain lantency computation relies on hardcoded limits to determine when the to use the low vs. high precision multiplier. Rewrite the code to use a more straightforward approach. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 11 +++