Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-18 Thread Ville Syrjälä
On Tue, Oct 17, 2017 at 04:23:07PM -0700, Rodrigo Vivi wrote: > On Tue, Oct 17, 2017 at 08:36:14PM +, Ville Syrjälä wrote: > > On Tue, Oct 17, 2017 at 09:02:05PM +0300, Ville Syrjälä wrote: > > > On Tue, Oct 17, 2017 at 10:45:22AM -0700, Rodrigo Vivi wrote: > > > > On Tue, Oct 17, 2017 at

Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-17 Thread Rodrigo Vivi
On Tue, Oct 17, 2017 at 08:36:14PM +, Ville Syrjälä wrote: > On Tue, Oct 17, 2017 at 09:02:05PM +0300, Ville Syrjälä wrote: > > On Tue, Oct 17, 2017 at 10:45:22AM -0700, Rodrigo Vivi wrote: > > > On Tue, Oct 17, 2017 at 05:23:20PM +, Ville Syrjälä wrote: > > > > On Tue, Oct 17, 2017 at

Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-17 Thread Ville Syrjälä
On Tue, Oct 17, 2017 at 09:02:05PM +0300, Ville Syrjälä wrote: > On Tue, Oct 17, 2017 at 10:45:22AM -0700, Rodrigo Vivi wrote: > > On Tue, Oct 17, 2017 at 05:23:20PM +, Ville Syrjälä wrote: > > > On Tue, Oct 17, 2017 at 09:47:05AM -0700, Rodrigo Vivi wrote: > > > > On Tue, Oct 17, 2017 at

Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-17 Thread Ville Syrjälä
On Tue, Oct 17, 2017 at 10:45:22AM -0700, Rodrigo Vivi wrote: > On Tue, Oct 17, 2017 at 05:23:20PM +, Ville Syrjälä wrote: > > On Tue, Oct 17, 2017 at 09:47:05AM -0700, Rodrigo Vivi wrote: > > > On Tue, Oct 17, 2017 at 03:44:21PM +, Ville Syrjälä wrote: > > > > On Tue, Oct 03, 2017 at

Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-17 Thread Rodrigo Vivi
On Tue, Oct 17, 2017 at 05:23:20PM +, Ville Syrjälä wrote: > On Tue, Oct 17, 2017 at 09:47:05AM -0700, Rodrigo Vivi wrote: > > On Tue, Oct 17, 2017 at 03:44:21PM +, Ville Syrjälä wrote: > > > On Tue, Oct 03, 2017 at 12:06:08AM -0700, Rodrigo Vivi wrote: > > > > From: "Kahola, Mika"

Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-17 Thread Ville Syrjälä
On Tue, Oct 17, 2017 at 09:47:05AM -0700, Rodrigo Vivi wrote: > On Tue, Oct 17, 2017 at 03:44:21PM +, Ville Syrjälä wrote: > > On Tue, Oct 03, 2017 at 12:06:08AM -0700, Rodrigo Vivi wrote: > > > From: "Kahola, Mika" > > > > > > Display Voltage and Frequency Switching

Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-17 Thread Rodrigo Vivi
On Tue, Oct 17, 2017 at 03:44:21PM +, Ville Syrjälä wrote: > On Tue, Oct 03, 2017 at 12:06:08AM -0700, Rodrigo Vivi wrote: > > From: "Kahola, Mika" > > > > Display Voltage and Frequency Switching (DVFS) is used to adjust the > > display voltage to match the display

Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-17 Thread Ville Syrjälä
On Tue, Oct 03, 2017 at 12:06:08AM -0700, Rodrigo Vivi wrote: > From: "Kahola, Mika" > > Display Voltage and Frequency Switching (DVFS) is used to adjust the > display voltage to match the display clock frequencies. If voltage is > set too low, it will break functionality.

Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-04 Thread Manasi Navare
On Tue, Oct 03, 2017 at 12:06:08AM -0700, Rodrigo Vivi wrote: > From: "Kahola, Mika" > > Display Voltage and Frequency Switching (DVFS) is used to adjust the > display voltage to match the display clock frequencies. If voltage is > set too low, it will break functionality.

[Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

2017-10-03 Thread Rodrigo Vivi
From: "Kahola, Mika" Display Voltage and Frequency Switching (DVFS) is used to adjust the display voltage to match the display clock frequencies. If voltage is set too low, it will break functionality. If voltage is set too high, it will waste power. Voltage level is