On Wed, Jul 27, 2022 at 06:34:04PM -0700, Radhakrishna Sripada wrote:
> Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
> From spec we have registers GPIO_CTL[1-5] mapped to combo phys and
This description is misleading since MTL doesn't have "combo phys."
I think the key
Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
>From spec we have registers GPIO_CTL[1-5] mapped to combo phys and
GPIO_CTL[9-14] are mapped to TC ports.
BSpec: 49306
Original Author: Brian J Lovin
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/in
