Bspec: 33450 lists 2 sequences for Wa_14010685332.
The original sequence was implemented for PCH_ICP+
commit b896898c7369 implemented the tweaked verson for ICP, JSP and MCC
commit b8441b288d60 removed the orignal and applied the tweaked one to
all PCHs(CNP+), and caused regressions on ADP.

Fixes: b8441b288d60 ("drm/i915: Tweaked Wa_14010685332 for all PCHs")
Signed-off-by: James Xiong <james.xi...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
b/drivers/gpu/drm/i915/display/intel_display_power.c
index 4c1de91e56ff..235b22205393 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -2199,9 +2199,14 @@ void intel_display_power_suspend_late(struct 
drm_i915_private *i915)
                hsw_enable_pc8(i915);
        }
 
-       /* Tweaked Wa_14010685332:cnp,icp,jsp,mcc,tgp,adp */
-       if (INTEL_PCH_TYPE(i915) >= PCH_CNP && INTEL_PCH_TYPE(i915) < PCH_DG1)
+       /* Tweaked Wa_14010685332:cnp,icp,jsp,mcc,tgp */
+       if (INTEL_PCH_TYPE(i915) >= PCH_CNP && INTEL_PCH_TYPE(i915) < PCH_DG1) {
                intel_de_rmw(i915, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, 
SBCLK_RUN_REFCLK_DIS);
+
+               /* Original Wa_14010685332: adp */
+               if (INTEL_PCH_TYPE(i915) == PCH_ADP)
+                       intel_de_rmw(i915, SOUTH_CHICKEN1, 
SBCLK_RUN_REFCLK_DIS, 0);
+       }
 }
 
 void intel_display_power_resume_early(struct drm_i915_private *i915)
@@ -2214,8 +2219,9 @@ void intel_display_power_resume_early(struct 
drm_i915_private *i915)
                hsw_disable_pc8(i915);
        }
 
-       /* Tweaked Wa_14010685332:cnp,icp,jsp,mcc,tgp,adp */
-       if (INTEL_PCH_TYPE(i915) >= PCH_CNP && INTEL_PCH_TYPE(i915) < PCH_DG1)
+       /* Tweaked Wa_14010685332:cnp,icp,jsp,mcc,tgp */
+       if ((INTEL_PCH_TYPE(i915) >= PCH_CNP && INTEL_PCH_TYPE(i915) < PCH_DG1) 
&&
+           INTEL_PCH_TYPE(i915) != PCH_ADP)
                intel_de_rmw(i915, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, 0);
 }
 
-- 
2.25.1

Reply via email to