Let the MG plls have their own hooks since it shares very little with
other PLL types. It's also better so the platform info contains the info
if the PLL is for MG PHY rather than relying on the PLL ids.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 122 +
On Fri, Feb 22, 2019 at 03:23:22PM -0800, Lucas De Marchi wrote:
> Let the MG plls have their own hooks since it shares very little with
> other PLL types. It's also better so the platform info contains the info
> if the PLL is for MG PHY rather than relying on the PLL ids.
>
> Signed-off-by: Luca
On Mon, Feb 25, 2019 at 10:42:12PM +0200, Ville Syrjälä wrote:
On Fri, Feb 22, 2019 at 03:23:22PM -0800, Lucas De Marchi wrote:
Let the MG plls have their own hooks since it shares very little with
other PLL types. It's also better so the platform info contains the info
if the PLL is for MG PHY
On Mon, Feb 25, 2019 at 04:03:05PM -0800, Lucas De Marchi wrote:
> On Mon, Feb 25, 2019 at 10:42:12PM +0200, Ville Syrjälä wrote:
> >On Fri, Feb 22, 2019 at 03:23:22PM -0800, Lucas De Marchi wrote:
> >> Let the MG plls have their own hooks since it shares very little with
> >> other PLL types. It's
On Tue, Feb 26, 2019 at 04:21:01PM +0200, Ville Syrjälä wrote:
On Mon, Feb 25, 2019 at 04:03:05PM -0800, Lucas De Marchi wrote:
On Mon, Feb 25, 2019 at 10:42:12PM +0200, Ville Syrjälä wrote:
>On Fri, Feb 22, 2019 at 03:23:22PM -0800, Lucas De Marchi wrote:
>> Let the MG plls have their own hooks
On Tue, Feb 26, 2019 at 11:15:44AM -0800, Lucas De Marchi wrote:
> On Tue, Feb 26, 2019 at 04:21:01PM +0200, Ville Syrjälä wrote:
> >On Mon, Feb 25, 2019 at 04:03:05PM -0800, Lucas De Marchi wrote:
> >> On Mon, Feb 25, 2019 at 10:42:12PM +0200, Ville Syrjälä wrote:
> >> >On Fri, Feb 22, 2019 at 03:
