On Sat, 23 Nov 2013 14:55:42 +0530
deepa...@intel.com wrote:
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4840,8 +4840,8 @@
#define EDP_LINK_TRAIN_VOL_EMP_MASK_IVB (0x3f22)
#define FORCEWAKE 0xA18C
-#define
From: Deepak S deepa...@intel.com
Added power well arguments to all the force wake routines
to help us individually control power well based on the
scenario.
Signed-off-by: Deepak S deepa...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 8 +++---
drivers/gpu/drm/i915/i915_drv.h