Re: [Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

2021-03-08 Thread Nautiyal, Ankit K
As I realized, this patch is mixing DPCD rev and DP version, need an appropriate check instead. As for the gitlab issue https://gitlab.freedesktop.org/drm/intel/-/issues/2868 this seems to be not due to a DPCD register not defined for an older sink. The DPCD read in that case should have bee

Re: [Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

2021-02-08 Thread Nautiyal, Ankit K
On 2/8/2021 4:45 PM, Jani Nikula wrote: On Thu, 04 Feb 2021, Ankit Nautiyal wrote: DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E. Do not read the registers if DPCD rev < 1.4. Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/2868 Please use Fixes: to reference c

Re: [Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

2021-02-08 Thread Jani Nikula
On Thu, 04 Feb 2021, Ankit Nautiyal wrote: > DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E. > Do not read the registers if DPCD rev < 1.4. > > Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/2868 Please use Fixes: to reference commits that this patch fixes. Please

Re: [Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

2021-02-05 Thread Navare, Manasi
On Fri, Feb 05, 2021 at 10:06:48PM +0200, Ville Syrjälä wrote: > On Fri, Feb 05, 2021 at 12:07:41PM -0800, Navare, Manasi wrote: > > On Fri, Feb 05, 2021 at 09:58:07PM +0200, Ville Syrjälä wrote: > > > On Thu, Feb 04, 2021 at 12:18:40PM +0530, Ankit Nautiyal wrote: > > > > DP-HDMI2.1 PCON has DSC e

Re: [Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

2021-02-05 Thread Ville Syrjälä
On Fri, Feb 05, 2021 at 12:07:41PM -0800, Navare, Manasi wrote: > On Fri, Feb 05, 2021 at 09:58:07PM +0200, Ville Syrjälä wrote: > > On Thu, Feb 04, 2021 at 12:18:40PM +0530, Ankit Nautiyal wrote: > > > DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E. > > > Do not read the regis

Re: [Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

2021-02-05 Thread Navare, Manasi
On Fri, Feb 05, 2021 at 09:58:07PM +0200, Ville Syrjälä wrote: > On Thu, Feb 04, 2021 at 12:18:40PM +0530, Ankit Nautiyal wrote: > > DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E. > > Do not read the registers if DPCD rev < 1.4. > > > > Fixes: https://gitlab.freedesktop.org/d

Re: [Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

2021-02-05 Thread Ville Syrjälä
On Thu, Feb 04, 2021 at 12:18:40PM +0530, Ankit Nautiyal wrote: > DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E. > Do not read the registers if DPCD rev < 1.4. > > Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/2868 > Signed-off-by: Ankit Nautiyal > --- > drivers/

[Intel-gfx] [PATCH 1/3] i915/display/intel_dp: Read PCON DSC ENC caps only for DPCD rev >= 1.4

2021-02-03 Thread Ankit Nautiyal
DP-HDMI2.1 PCON has DSC encoder caps defined in registers 0x92-0x9E. Do not read the registers if DPCD rev < 1.4. Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/2868 Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp.c | 4 +++- 1 file changed, 3 insertions(+), 1 d