On Tue, May 27, 2014 at 10:24:14PM +0200, Daniel Vetter wrote:
On Tue, May 27, 2014 at 10:32:47PM +0300, Ville Syrjälä wrote:
On Fri, May 23, 2014 at 01:16:40PM -0700, Jesse Barnes wrote:
This is a bit like the CMN reset de-assert we do in DPIO_CTL, except
that it resets the whole common
On Tue, May 27, 2014 at 10:32:47PM +0300, Ville Syrjälä wrote:
On Fri, May 23, 2014 at 01:16:40PM -0700, Jesse Barnes wrote:
This is a bit like the CMN reset de-assert we do in DPIO_CTL, except
that it resets the whole common lane section of the PHY. This is
required on machines where the
This is a bit like the CMN reset de-assert we do in DPIO_CTL, except
that it resets the whole common lane section of the PHY. This is
required on machines where the BIOS doesn't do this for us on boot or
resume to properly re-calibrate and get the PHY ready to transmit data.
Without this patch,
