Re: [Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-10-09 Thread Matthew Auld
On 9 October 2017 at 13:07, Ville Syrjälä wrote: > On Mon, Oct 02, 2017 at 03:31:44PM +0300, Joonas Lahtinen wrote: >> On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote: >> > When SW enables the use of 2M/1G pages, it must disable the GTT cache. >> > >> > v2:

Re: [Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-10-09 Thread Ville Syrjälä
On Mon, Oct 02, 2017 at 03:31:44PM +0300, Joonas Lahtinen wrote: > On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote: > > When SW enables the use of 2M/1G pages, it must disable the GTT cache. > > > > v2: don't disable for Cherryview which doesn't even support 48b PPGTT! > > > > v3:

[Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-10-06 Thread Matthew Auld
When SW enables the use of 2M/1G pages, it must disable the GTT cache. v2: don't disable for Cherryview which doesn't even support 48b PPGTT! v3: explicitly check that the system does support 2M/1G pages v4: split WA and decision logic Signed-off-by: Matthew Auld Cc:

[Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-10-05 Thread Matthew Auld
When SW enables the use of 2M/1G pages, it must disable the GTT cache. v2: don't disable for Cherryview which doesn't even support 48b PPGTT! v3: explicitly check that the system does support 2M/1G pages v4: split WA and decision logic Signed-off-by: Matthew Auld Cc:

Re: [Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-10-03 Thread Joonas Lahtinen
+ Mika for more comments as the original reviewer On Mon, 2017-10-02 at 14:52 +0100, Matthew Auld wrote: > On 2 October 2017 at 13:31, Joonas Lahtinen > wrote: > > On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote: > > > When SW enables the use of 2M/1G

Re: [Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-10-02 Thread Matthew Auld
On 2 October 2017 at 13:31, Joonas Lahtinen wrote: > On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote: >> When SW enables the use of 2M/1G pages, it must disable the GTT cache. >> >> v2: don't disable for Cherryview which doesn't even support 48b PPGTT! >> >>

Re: [Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-10-02 Thread Joonas Lahtinen
On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote: > When SW enables the use of 2M/1G pages, it must disable the GTT cache. > > v2: don't disable for Cherryview which doesn't even support 48b PPGTT! > > v3: explicitly check that the system does support 2M/1G pages > > Signed-off-by: Matthew

[Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-09-29 Thread Matthew Auld
When SW enables the use of 2M/1G pages, it must disable the GTT cache. v2: don't disable for Cherryview which doesn't even support 48b PPGTT! v3: explicitly check that the system does support 2M/1G pages Signed-off-by: Matthew Auld Cc: Joonas Lahtinen

Re: [Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-09-26 Thread Mika Kuoppala
Matthew Auld writes: > When SW enables the use of 2M/1G pages, it must disable the GTT cache. > > v2: don't disable for Cherryview which doesn't even support 48b PPGTT! > > v3: explicitly check that the system does support 2M/1G pages > > Signed-off-by: Matthew Auld

[Intel-gfx] [PATCH 11/21] drm/i915: disable GTT cache for 2M pages

2017-09-22 Thread Matthew Auld
When SW enables the use of 2M/1G pages, it must disable the GTT cache. v2: don't disable for Cherryview which doesn't even support 48b PPGTT! v3: explicitly check that the system does support 2M/1G pages Signed-off-by: Matthew Auld Cc: Joonas Lahtinen