Re: [Intel-gfx] [PATCH 12/16] drm/i915: Fix CHV DSI PLL refclk during state readout

On Tue, 15 Mar 2016, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Use the proper refclock frequency (100MHz) when reading out the > current DSI clock on CHV. > > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/intel_dsi_pll.c | 2 +- > 1 fi

[Intel-gfx] [PATCH 12/16] drm/i915: Fix CHV DSI PLL refclk during state readout

From: Ville Syrjälä Use the proper refclock frequency (100MHz) when reading out the current DSI clock on CHV. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_dsi_pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/driver