> -Original Message-
> From: Ander Conselvan De Oliveira [mailto:conselv...@gmail.com]
> Sent: Monday, March 23, 2015 12:34 AM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 16/19] drm/i915: Check lane sharing between pipes B & C
> using atomic state
>
On Sun, 2015-03-22 at 16:20 +, Konduru, Chandra wrote:
>
>
> > -Original Message-
> > From: Conselvan De Oliveira, Ander
> > Sent: Thursday, March 19, 2015 11:46 PM
> > To: Konduru, Chandra
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: Re: [PATCH 16/19] drm/i915: Check lane sha
> -Original Message-
> From: Conselvan De Oliveira, Ander
> Sent: Thursday, March 19, 2015 11:46 PM
> To: Konduru, Chandra
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 16/19] drm/i915: Check lane sharing between pipes B & C
> using atomic state
>
> On Thu, 2015-03-19 at 20
On Thu, 2015-03-19 at 20:58 +, Konduru, Chandra wrote:
>
> > -Original Message-
> > From: Conselvan De Oliveira, Ander
> > Sent: Friday, March 13, 2015 2:49 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Konduru, Chandra; Conselvan De Oliveira, Ander
> > Subject: [PATCH 16/19] drm/
> -Original Message-
> From: Conselvan De Oliveira, Ander
> Sent: Friday, March 13, 2015 2:49 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Konduru, Chandra; Conselvan De Oliveira, Ander
> Subject: [PATCH 16/19] drm/i915: Check lane sharing between pipes B & C using
> atomic state
>
> M
Makes that code atomic ready.
Signed-off-by: Ander Conselvan de Oliveira
---
drivers/gpu/drm/i915/intel_display.c | 49 ++--
1 file changed, 42 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.
