From: Mahesh Kumar <mahesh1.ku...@intel.com>
TGL has 3 combo-phy ports. This patch adds offset of third port to
combo-phy port register macros.
Signed-off-by: Mahesh Kumar <mahesh1.ku...@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cd52b34dad45..64ff887275a0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1789,12 +1789,14 @@ enum i915_power_well_id {
#define BXT_PORT_CL1CM_DW30(phy) _BXT_PHY((phy), _PORT_CL1CM_DW30_BC)
/*
- * CNL/ICL Port/COMBO-PHY Registers
+ * CNL/ICL/TGL Port/COMBO-PHY Registers
*/
#define _ICL_COMBOPHY_A 0x162000
#define _ICL_COMBOPHY_B 0x6C000
+#define _TGL_COMBOPHY_C 0x160000
#define _ICL_COMBOPHY(port) _PICK(port, _ICL_COMBOPHY_A, \
- _ICL_COMBOPHY_B)
+ _ICL_COMBOPHY_B, \
+ _TGL_COMBOPHY_C)
/* CNL/ICL Port CL_DW registers */
#define _ICL_PORT_CL_DW(dw, port) (_ICL_COMBOPHY(port) + \
--
2.21.0
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