Re: [Intel-gfx] [PATCH 28/71] drm/i915/chv: Added CHV specific register read and write

2014-04-18 Thread Deepak S
On Friday 18 April 2014 05:58 AM, Ben Widawsky wrote: On Wed, Apr 09, 2014 at 01:28:26PM +0300, ville.syrj...@linux.intel.com wrote: From: Deepak S deepa...@intel.com Support to individually control Media/Render well based on the register access. Add CHV specific write function to habdle

Re: [Intel-gfx] [PATCH 28/71] drm/i915/chv: Added CHV specific register read and write

2014-04-17 Thread Ben Widawsky
On Wed, Apr 09, 2014 at 01:28:26PM +0300, ville.syrj...@linux.intel.com wrote: From: Deepak S deepa...@intel.com Support to individually control Media/Render well based on the register access. Add CHV specific write function to habdle difference between registers that are sadowed vs those

[Intel-gfx] [PATCH 28/71] drm/i915/chv: Added CHV specific register read and write

2014-04-09 Thread ville . syrjala
From: Deepak S deepa...@intel.com Support to individually control Media/Render well based on the register access. Add CHV specific write function to habdle difference between registers that are sadowed vs those that need forcewake even for writes. v2: Drop write FIFO for CHV and add comman well

Re: [Intel-gfx] [PATCH 28/71] drm/i915/chv: Added CHV specific register read and write

2014-04-09 Thread Chris Wilson
On Wed, Apr 09, 2014 at 01:28:26PM +0300, ville.syrj...@linux.intel.com wrote: From: Deepak S deepa...@intel.com Support to individually control Media/Render well based on the register access. Add CHV specific write function to habdle difference between registers that are sadowed vs those

Re: [Intel-gfx] [PATCH 28/71] drm/i915/chv: Added CHV specific register read and write

2014-04-09 Thread Ville Syrjälä
On Wed, Apr 09, 2014 at 02:16:04PM +0100, Chris Wilson wrote: On Wed, Apr 09, 2014 at 01:28:26PM +0300, ville.syrj...@linux.intel.com wrote: From: Deepak S deepa...@intel.com Support to individually control Media/Render well based on the register access. Add CHV specific write