On 25.09.13 10:11, Ville Syrjälä wrote:
On Wed, Sep 25, 2013 at 05:12:54AM +0200, Mario Kleiner wrote:
On 23.09.13 12:02, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
The DSL register increments at the start of horizontal sync, so it
manages to miss the entire active portion of
On Wed, Sep 25, 2013 at 11:11:30AM +0300, Ville Syrjälä wrote:
> On Wed, Sep 25, 2013 at 05:12:54AM +0200, Mario Kleiner wrote:
> > This one i don't know. I think i can't follow the logic, but i don't
> > know enough about the way the intel hw counts.
> >
> > Do you mean the counter increments wh
On Wed, Sep 25, 2013 at 05:12:54AM +0200, Mario Kleiner wrote:
>
>
> On 23.09.13 12:02, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > The DSL register increments at the start of horizontal sync, so it
> > manages to miss the entire active portion of the current line.
> >
>
On 23.09.13 12:02, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
The DSL register increments at the start of horizontal sync, so it
manages to miss the entire active portion of the current line.
Improve the get_scanoutpos accuracy a bit when the scanout position is
close to the st
From: Ville Syrjälä
The DSL register increments at the start of horizontal sync, so it
manages to miss the entire active portion of the current line.
Improve the get_scanoutpos accuracy a bit when the scanout position is
close to the start or end of vblank. We can do that by double checking
the
