[Intel-gfx] [PATCH 3/3] drm/i915: Mask PM interrupt generation when at up/down limits

2014-03-27 Thread Chris Wilson
The speculation is that we can conserve more power by masking off the interrupts at source (PMINTRMSK) rather than filtering them by the up/down thresholds (RPINTLIM). Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Cc: Deepak S deepa...@intel.com Cc: Ville Syrjälä

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Mask PM interrupt generation when at up/down limits

2014-03-27 Thread Chris Wilson
On Thu, Mar 27, 2014 at 08:24:21AM +, Chris Wilson wrote: The speculation is that we can conserve more power by masking off the interrupts at source (PMINTRMSK) rather than filtering them by the up/down thresholds (RPINTLIM). Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Cc:

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Mask PM interrupt generation when at up/down limits

2014-03-27 Thread Deepak S
On Thursday 27 March 2014 01:54 PM, Chris Wilson wrote: The speculation is that we can conserve more power by masking off the interrupts at source (PMINTRMSK) rather than filtering them by the up/down thresholds (RPINTLIM). Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Cc: Deepak S

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Mask PM interrupt generation when at up/down limits

2014-03-27 Thread Chris Wilson
On Thu, Mar 27, 2014 at 08:21:29PM +0530, Deepak S wrote: On VLV,  gen6_enable_rps_interrupts  is used to enable turbo interrutpts. I think we need to extend gen6_rps_pm_mask  to valleyview also? Check patch 4/3. -Chris -- Chris Wilson, Intel Open Source Technology Centre