[Intel-gfx] [PATCH 33/49] drm/i915: Reduce locking in gen8 IRQ handler

2015-03-27 Thread Chris Wilson
Similar in vain in reducing the number of unrequired spinlocks used for execlist command submission (where the forcewake is required but manually controlled), we know that the IRQ registers are outside of the powerwell and so we can access them directly. Since we now have direct access exported

Re: [Intel-gfx] [PATCH 33/49] drm/i915: Reduce locking in gen8 IRQ handler

2015-03-27 Thread Daniel Vetter
On Fri, Mar 27, 2015 at 11:02:05AM +, Chris Wilson wrote: Similar in vain in reducing the number of unrequired spinlocks used for execlist command submission (where the forcewake is required but manually controlled), we know that the IRQ registers are outside of the powerwell and so we can

Re: [Intel-gfx] [PATCH 33/49] drm/i915: Reduce locking in gen8 IRQ handler

2015-03-27 Thread Chris Wilson
On Fri, Mar 27, 2015 at 03:13:08PM +0100, Daniel Vetter wrote: On Fri, Mar 27, 2015 at 11:02:05AM +, Chris Wilson wrote: Similar in vain in reducing the number of unrequired spinlocks used for execlist command submission (where the forcewake is required but manually controlled), we know