[Intel-gfx] [PATCH 4/4] drm/i915: separate subplatform init and runtime feature init

[Jani Nikula]

Adjusting ->port_mask does not belong in
intel_device_info_subplatform_init(), but rather
intel_display_device_info_runtime_init().

Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 7 +++++++
 drivers/gpu/drm/i915/intel_device_info.c            | 5 -----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c 
b/drivers/gpu/drm/i915/display/intel_display_device.c
index 11f4a6c54cc7..9f0266318a41 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -948,6 +948,13 @@ static void 
__intel_display_device_info_runtime_init(struct drm_i915_private *i9
        BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->cpu_transcoder_mask) < 
I915_MAX_TRANSCODERS);
        BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->port_mask) < 
I915_MAX_PORTS);
 
+       /* This covers both ULT and ULX */
+       if (IS_HASWELL_ULT(i915) || IS_BROADWELL_ULT(i915))
+               display_runtime->port_mask &= ~BIT(PORT_D);
+
+       if (IS_ICL_WITH_PORT_F(i915))
+               display_runtime->port_mask |= BIT(PORT_F);
+
        /* Wa_14011765242: adl-s A0,A1 */
        if (IS_ALDERLAKE_S(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_A2))
                for_each_pipe(i915, pipe)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c 
b/drivers/gpu/drm/i915/intel_device_info.c
index db3997cec6ff..59bea1398c91 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -27,7 +27,6 @@
 #include <drm/drm_print.h>
 #include <drm/i915_pciids.h>
 
-#include "display/intel_display_device.h"
 #include "gt/intel_gt_regs.h"
 #include "i915_drv.h"
 #include "i915_reg.h"
@@ -232,19 +231,15 @@ static void intel_device_info_subplatform_init(struct 
drm_i915_private *i915)
        if (find_devid(devid, subplatform_ult_ids,
                       ARRAY_SIZE(subplatform_ult_ids))) {
                mask = BIT(INTEL_SUBPLATFORM_ULT);
-               if (IS_HASWELL(i915) || IS_BROADWELL(i915))
-                       DISPLAY_RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D);
        } else if (find_devid(devid, subplatform_ulx_ids,
                              ARRAY_SIZE(subplatform_ulx_ids))) {
                mask = BIT(INTEL_SUBPLATFORM_ULX);
                if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
                        /* ULX machines are also considered ULT. */
                        mask |= BIT(INTEL_SUBPLATFORM_ULT);
-                       DISPLAY_RUNTIME_INFO(i915)->port_mask &= ~BIT(PORT_D);
                }
        } else if (find_devid(devid, subplatform_portf_ids,
                              ARRAY_SIZE(subplatform_portf_ids))) {
-               DISPLAY_RUNTIME_INFO(i915)->port_mask |= BIT(PORT_F);
                mask = BIT(INTEL_SUBPLATFORM_PORTF);
        } else if (find_devid(devid, subplatform_uy_ids,
                           ARRAY_SIZE(subplatform_uy_ids))) {
-- 
2.39.2