This only applies to external sinks.
Signed-off-by: Jesse Barnes
---
drivers/gpu/drm/i915/intel_dp.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 7642415..df7cc11 100644
--- a/drivers/gpu/drm/i91
On Sat, 05 Apr 2014, Jesse Barnes wrote:
> This only applies to external sinks.
[citation needed]
eDP 1.3 has SET_POWER_CAPABLE (bit 7) in in DPCD
EDP_GENERAL_CAPABILITY_REGISTER_1 (register 0x702) which indicates
whether panel power state can be controlled through DP_SET_POWER. Even
when the pa
On Mon, 07 Apr 2014 11:36:46 +0300
Jani Nikula wrote:
> On Sat, 05 Apr 2014, Jesse Barnes wrote:
> > This only applies to external sinks.
>
> [citation needed]
>
> eDP 1.3 has SET_POWER_CAPABLE (bit 7) in in DPCD
> EDP_GENERAL_CAPABILITY_REGISTER_1 (register 0x702) which indicates
> whether pa