> -Original Message-
> From: Lee, Shawn C
> Sent: Tuesday, July 20, 2021 8:01 PM
> To: Kulkarni, Vandita ; intel-
> g...@lists.freedesktop.org
> Cc: Ville Syrjala ; Jani Nikula
> ; Chiou, Cooper ;
> Tseng, William
> Subject: RE: [PATCH 5/5] drm/i915: Get proper min cdclk if vDSC enabled
>
On Tue, July 19, 2021, Vandita Kulkarni wrote:
>>
>> VDSC engine can process only 1 pixel per Cd clock. In case VDSC is
>> used and max slice count == 1, max supported pixel clock should be 100% of
>> CD clock.
>> Then do min_cdclk and pixel clock comparison to get proper min cdclk.
>>
>> Cc
> -Original Message-
> From: Lee, Shawn C
> Sent: Monday, July 19, 2021 12:52 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Lee, Shawn C ; Ville Syrjala
> ; Jani Nikula ;
> Kulkarni, Vandita ; Chiou, Cooper
> ; Tseng, William
> Subject: [PATCH 5/5] drm/i915: Get proper min cdclk if vDSC
VDSC engine can process only 1 pixel per Cd clock. In case
VDSC is used and max slice count == 1, max supported pixel
clock should be 100% of CD clock. Then do min_cdclk and
pixel clock comparison to get proper min cdclk.
Cc: Ville Syrjala
Cc: Jani Nikula
Cc: Vandita Kulkarni
Cc: Cooper Chiou
