[Intel-gfx] [PATCH 59/71] drm/i915/chv: Fix CHV PLL state tracking

From: Ville Syrjälä Setup the pipe config dpll state correctly for CHV. Also add a assert_pipe_disabled() to chv_disable_pll(), and program the DPLL_MD registers in chv_enable_pll(). Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 41 +++-

Re: [Intel-gfx] [PATCH 59/71] drm/i915/chv: Fix CHV PLL state tracking

ville.syrj...@linux.intel.com writes: > From: Ville Syrjälä > > Setup the pipe config dpll state correctly for CHV. Also add > a assert_pipe_disabled() to chv_disable_pll(), and program the > DPLL_MD registers in chv_enable_pll(). > > Signed-off-by: Ville Syrjälä Reviewed-by: Mika Kuoppala >