subject:"\[Intel\-gfx\] \[PATCH 6\/6\] drm\/i915\/rps\: Freq caps for MTL"

Re: [Intel-gfx] [PATCH 6/6] drm/i915/rps: Freq caps for MTL

2022-09-07 Thread Dixit, Ashutosh

On Mon, 05 Sep 2022 02:40:08 -0700, Jani Nikula wrote: > On Fri, 02 Sep 2022, Ashutosh Dixit wrote: > > For MTL, when reading from HW, RP0, RP1 (actuall RPe) and RPn freq use an > > entirely different set of registers with different fields, bitwidths and > > units. > > > > Cc: Badal Nilawar > > S

Re: [Intel-gfx] [PATCH 6/6] drm/i915/rps: Freq caps for MTL

2022-09-05 Thread Jani Nikula

On Fri, 02 Sep 2022, Ashutosh Dixit wrote: > For MTL, when reading from HW, RP0, RP1 (actuall RPe) and RPn freq use an > entirely different set of registers with different fields, bitwidths and > units. > > Cc: Badal Nilawar > Signed-off-by: Ashutosh Dixit > --- > drivers/gpu/drm/i915/gt/intel_

[Intel-gfx] [PATCH 6/6] drm/i915/rps: Freq caps for MTL

2022-09-02 Thread Ashutosh Dixit

For MTL, when reading from HW, RP0, RP1 (actuall RPe) and RPn freq use an entirely different set of registers with different fields, bitwidths and units. Cc: Badal Nilawar Signed-off-by: Ashutosh Dixit --- drivers/gpu/drm/i915/gt/intel_rps.c | 20 drivers/gpu/drm/i915/i915_