Re: [Intel-gfx] [PATCH 6/6] drm/i915/skl: Restore the DDI translation tables when enabling PW1

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang...@intel.com) Task id: 5908 -Summary- Platform Delta drm-intel-nightly Series Applied PNV -13 275/275

[Intel-gfx] [PATCH 6/6] drm/i915/skl: Restore the DDI translation tables when enabling PW1

I was dumping the DDI translation tables to make sure my patch updating the HDMI entry was doing the right thing when I noticed that the table was showing reset values after DPMS. And indeed, the DDI translation registers are in power well 1 on SKL, and so we're losing their values when shutting d