Re: [Intel-gfx] [PATCH 6/6] drm/i915: expose rcs topology through query uAPI

2018-01-12 Thread Tvrtko Ursulin
On 11/01/2018 18:38, Lionel Landwerlin wrote: On 11/01/18 12:45, Tvrtko Ursulin wrote: [snip] +    __u32 n_slices; + +    __u8 data[]; Is a zero size array a GCC extension or something? I somehow seem to remember someone was complaining about this. [0] is a GNU C extension [] is a f

Re: [Intel-gfx] [PATCH 6/6] drm/i915: expose rcs topology through query uAPI

2018-01-11 Thread Lionel Landwerlin
On 11/01/18 12:45, Tvrtko Ursulin wrote: On 18/12/2017 15:35, Lionel Landwerlin wrote: With the introduction of asymetric slices in CNL, we cannot rely on asymmetric Check ;) the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more det

Re: [Intel-gfx] [PATCH 6/6] drm/i915: expose rcs topology through query uAPI

2018-01-11 Thread Tvrtko Ursulin
On 18/12/2017 15:35, Lionel Landwerlin wrote: With the introduction of asymetric slices in CNL, we cannot rely on asymmetric the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more detailed way of querying the Gen's GPU topology that doesn

[Intel-gfx] [PATCH 6/6] drm/i915: expose rcs topology through query uAPI

2017-12-18 Thread Lionel Landwerlin
With the introduction of asymetric slices in CNL, we cannot rely on the previous SUBSLICE_MASK getparam to tell userspace what subslices are available. Here we introduce a more detailed way of querying the Gen's GPU topology that doesn't aggregate numbers. This is essential for monitoring parts of