[Intel-gfx] [PATCH 7/8] drm/i915/fbc: Implement Wa_16011863758 for icl+

2021-07-02 Thread Ville Syrjala
From: Ville Syrjälä There's some kind of weird corner cases in FBC which requires FBC segments to be separated by at least one extra cacheline. Make sure that is present. TODO: the formula laid out in the spec seem to be semi-nonsense so this is mostly my interpretation on what it is actually tr

Re: [Intel-gfx] [PATCH 7/8] drm/i915/fbc: Implement Wa_16011863758 for icl+

2021-08-19 Thread Juha-Pekka Heikkila
Maybe that TODO comment could be moved into the code instead of leaving it just into commit message? Either way, patch look ok to me. Reviewed-by: Juha-Pekka Heikkila On 2.7.2021 23.46, Ville Syrjala wrote: From: Ville Syrjälä There's some kind of weird corner cases in FBC which requires F