On Thu, Jun 29, 2017 at 01:41:16PM -0700, Manasi Navare wrote:
> Thanks for the review comments. Please find my responses below:
>
> On Thu, Jun 29, 2017 at 11:24:48PM +0300, Ville Syrjälä wrote:
> > On Wed, Jun 28, 2017 at 05:14:31PM -0700, Manasi Navare wrote:
> > > This patch fixes the DP AUX C
Thanks for the review comments. Please find my responses below:
On Thu, Jun 29, 2017 at 11:24:48PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 28, 2017 at 05:14:31PM -0700, Manasi Navare wrote:
> > This patch fixes the DP AUX CH timeouts observed during CI IGT
> > tests thus fixing the CI failures.
On Wed, Jun 28, 2017 at 05:14:31PM -0700, Manasi Navare wrote:
> This patch fixes the DP AUX CH timeouts observed during CI IGT
> tests thus fixing the CI failures. This is done by adding a
> quirk for a particular PCI device that requires the panel power
> cycle delay (T12) to be 300msecs more tha
Looks Good.
Reviewed-by: Clinton Taylor
-Clint
On 06/28/2017 05:14 PM, Manasi Navare wrote:
This patch fixes the DP AUX CH timeouts observed during CI IGT
tests thus fixing the CI failures. This is done by adding a
quirk for a particular PCI device that requires the panel power
cycle delay (
This patch fixes the DP AUX CH timeouts observed during CI IGT
tests thus fixing the CI failures. This is done by adding a
quirk for a particular PCI device that requires the panel power
cycle delay (T12) to be 300msecs more than the minimum value
specified in the eDP spec. So a quirk is implemente