Re: [Intel-gfx] [PATCH v2] drm/i915/guc: Properly capture & release GuC interrupts on Gen11+

2019-11-15 Thread Tvrtko Ursulin
On 05/11/2019 22:53, Daniele Ceraolo Spurio wrote: With the new interrupt re-partitioning in Gen11, GuC controls by itself the interrupts it receives, so steering bits and registers have been defeatured. Being this the case, when the GuC is in control of submissions we won't know what to do

Re: [Intel-gfx] [PATCH v2] drm/i915/guc: Properly capture & release GuC interrupts on Gen11+

2019-11-14 Thread John Harrison
On 11/5/2019 14:53, Daniele Ceraolo Spurio wrote: With the new interrupt re-partitioning in Gen11, GuC controls by itself the interrupts it receives, so steering bits and registers have been defeatured. Being this the case, when the GuC is in control of submissions we won't know what to do with

[Intel-gfx] [PATCH v2] drm/i915/guc: Properly capture & release GuC interrupts on Gen11+

2019-11-05 Thread Daniele Ceraolo Spurio
With the new interrupt re-partitioning in Gen11, GuC controls by itself the interrupts it receives, so steering bits and registers have been defeatured. Being this the case, when the GuC is in control of submissions we won't know what to do with the ctx switch interrupt in the driver, so disable