On Thu, 02 Jul 2020, Manasi Navare wrote:
> On Thu, Jul 02, 2020 at 12:15:26PM +0300, Stanislav Lisovskiy wrote:
>> We still need "Bump up CDCLK" workaround otherwise getting
>> underruns - however currently it blocks 8K as CDCLK = Pixel rate,
>> in 8K case would require CDCLK to be around 1 Ghz w
On Thu, Jul 02, 2020 at 12:15:26PM +0300, Stanislav Lisovskiy wrote:
> We still need "Bump up CDCLK" workaround otherwise getting
> underruns - however currently it blocks 8K as CDCLK = Pixel rate,
> in 8K case would require CDCLK to be around 1 Ghz which is not
> possible.
>
> v2: - Convert to ex
We still need "Bump up CDCLK" workaround otherwise getting
underruns - however currently it blocks 8K as CDCLK = Pixel rate,
in 8K case would require CDCLK to be around 1 Ghz which is not
possible.
v2: - Convert to expression(max(min_cdclk, min(pixel_rate, max_cdclk))
(Ville Syrjälä)
- U
