Re: [Intel-gfx] [PATCH v2] drm/i915: hsw: fix link training for eDP on port-A

2013-05-02 Thread Imre Deak
On Thu, 2013-05-02 at 14:45 -0300, Paulo Zanoni wrote: > Hi > > 2013/4/29 Imre Deak : > > According to BSpec the link training sequence for eDP on HSW port-A > > should be as follows: > > > > 1. link training: clock recovery > > 2. link training: equalization > > 3. link training: set idle transmi

Re: [Intel-gfx] [PATCH v2] drm/i915: hsw: fix link training for eDP on port-A

2013-05-02 Thread Paulo Zanoni
Hi 2013/4/29 Imre Deak : > According to BSpec the link training sequence for eDP on HSW port-A > should be as follows: > > 1. link training: clock recovery > 2. link training: equalization > 3. link training: set idle transmission mode > 4. display pipe enable > 5. link training: disable (set norm

[Intel-gfx] [PATCH v2] drm/i915: hsw: fix link training for eDP on port-A

2013-04-29 Thread Imre Deak
According to BSpec the link training sequence for eDP on HSW port-A should be as follows: 1. link training: clock recovery 2. link training: equalization 3. link training: set idle transmission mode 4. display pipe enable 5. link training: disable (set normal mode) Contrary to this at the moment