From: Ville Syrjälä <ville.syrj...@linux.intel.com>

Drop the locks around cursor plane register writes. The
lock isn't needed since each plane's register are neatly
contained on their own cachelines.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_cursor.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c 
b/drivers/gpu/drm/i915/display/intel_cursor.c
index 2ade8fdd9bdd..625c1fb68273 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -255,7 +255,6 @@ static void i845_cursor_update_arm(struct intel_plane 
*plane,
 {
        struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        u32 cntl = 0, base = 0, pos = 0, size = 0;
-       unsigned long irqflags;
 
        if (plane_state && plane_state->uapi.visible) {
                unsigned int width = drm_rect_width(&plane_state->uapi.dst);
@@ -270,8 +269,6 @@ static void i845_cursor_update_arm(struct intel_plane 
*plane,
                pos = intel_cursor_position(plane_state);
        }
 
-       spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
        /* On these chipsets we can only modify the base/size/stride
         * whilst the cursor is disabled.
         */
@@ -290,8 +287,6 @@ static void i845_cursor_update_arm(struct intel_plane 
*plane,
        } else {
                intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
        }
-
-       spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
 }
 
 static void i845_cursor_disable_arm(struct intel_plane *plane,
@@ -492,7 +487,6 @@ static void i9xx_cursor_update_arm(struct intel_plane 
*plane,
        struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum pipe pipe = plane->pipe;
        u32 cntl = 0, base = 0, pos = 0, fbc_ctl = 0;
-       unsigned long irqflags;
 
        if (plane_state && plane_state->uapi.visible) {
                int width = drm_rect_width(&plane_state->uapi.dst);
@@ -508,8 +502,6 @@ static void i9xx_cursor_update_arm(struct intel_plane 
*plane,
                pos = intel_cursor_position(plane_state);
        }
 
-       spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
        /*
         * On some platforms writing CURCNTR first will also
         * cause CURPOS to be armed by the CURBASE write.
@@ -555,8 +547,6 @@ static void i9xx_cursor_update_arm(struct intel_plane 
*plane,
                intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
                intel_de_write_fw(dev_priv, CURBASE(pipe), base);
        }
-
-       spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
 }
 
 static void i9xx_cursor_disable_arm(struct intel_plane *plane,
-- 
2.34.1

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