Re: [Intel-gfx] [PATCH v2 3/5] drm/i915: context submission pvmmio optimization

2018-10-31 Thread Zhang, Xiaolin
Ping review, thanks very much. BRs, Xiaolin -Original Message- From: Zhang, Xiaolin Sent: Friday, October 19, 2018 3:27 PM To: intel-gfx@lists.freedesktop.org Cc: intel-gvt-...@lists.freedesktop.org; Zhang, Xiaolin ; Zhenyu Wang ; Wang, Zhi A ; Chris Wilson ; Joonas Lahtinen ; He;

[Intel-gfx] [PATCH v2 3/5] drm/i915: context submission pvmmio optimization

2018-10-19 Thread Xiaolin Zhang
It is performance optimization to reduce mmio trap numbers from 4 to 1 durning ELSP porting writing (context submission). When context subission, to cache elsp_data[4] values in the shared page, the last elsp_data[0] port writing will be trapped to gvt for real context submission. Use