Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/skl: Update plane watermarks atomically during plane updates

On Thu, Jul 21, 2016 at 03:23:40PM -0400, Lyude wrote: > Thanks to Ville for suggesting this as a potential solution to pipe > underruns on Skylake. > > On Skylake all of the registers for configuring planes, including the > registers for configuring their watermarks, are double buffered. New >

[Intel-gfx] [PATCH v2 4/4] drm/i915/skl: Update plane watermarks atomically during plane updates

Thanks to Ville for suggesting this as a potential solution to pipe underruns on Skylake. On Skylake all of the registers for configuring planes, including the registers for configuring their watermarks, are double buffered. New values written to them won't take effect until said registers are