From: Deepak S deepa...@linux.intel.com
This WA is avoid problem between shadow vs wake FIFO unload
problem during CPD/RC6 transactions on CHV.
v2: Define individual bits GTFIFOCTL (Ville)
v3: move WA to uncore_early_sanitize (ville)
Signed-off-by: Deepak S deepa...@linux.intel.com
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On Wed, Apr 15, 2015 at 07:41:39PM +0530, deepa...@linux.intel.com wrote:
From: Deepak S deepa...@linux.intel.com
This WA is avoid problem between shadow vs wake FIFO unload
problem during CPD/RC6 transactions on CHV.
v2: Define individual bits GTFIFOCTL (Ville)
v3: move WA to
On Thursday 16 April 2015 12:09 AM, Ville Syrjälä wrote:
On Wed, Apr 15, 2015 at 07:41:39PM +0530, deepa...@linux.intel.com wrote:
From: Deepak S deepa...@linux.intel.com
This WA is avoid problem between shadow vs wake FIFO unload
problem during CPD/RC6 transactions on CHV.
v2: Define
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6201
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV
