Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Increase slice_height for DP

2023-02-14 Thread Jani Nikula
On Tue, 14 Feb 2023, Suraj Kandpal wrote: > According VDSC spec 1.2a Section 3.8 Options for Slice > implies that 108 lines is an optimal slice height, but any > size can be used as long as vertical active > integer multiple and maximum vertical slice count requirements are met. > > Bspec: 49259 >

[Intel-gfx] [PATCH v3] drm/i915/dp: Increase slice_height for DP

2023-02-13 Thread Suraj Kandpal
According VDSC spec 1.2a Section 3.8 Options for Slice implies that 108 lines is an optimal slice height, but any size can be used as long as vertical active integer multiple and maximum vertical slice count requirements are met. Bspec: 49259 --v3 -remove previous fallback code and return slice_h