gt; Subject: Re: [Intel-gfx] [PATCH v3 1/5] drm/i915/mtl: Fix Wa_16015201720
> implementation
>
> Hi Radhakrishna,
>
> > Since most of the comments aligned with Matt's suggestion pushed with
> Matt's r-b.
>
> OK, but next time, please hold on a bit as I might a
Hi Radhakrishna,
> Since most of the comments aligned with Matt's suggestion pushed with Matt's
> r-b.
OK, but next time, please hold on a bit as I might also have had
disagreements on your answers or I want to see it tested again
with the new changes.
It's not the case as I would have r-b it a
Hi Andi,
> -Original Message-
> From: Andi Shyti
> Sent: Thursday, March 9, 2023 8:30 AM
> To: Sripada, Radhakrishna
> Cc: intel-gfx@lists.freedesktop.org; De Marchi, Lucas
>
> Subject: Re: [Intel-gfx] [PATCH v3 1/5] drm/i915/mtl: Fix Wa_16015201720
>
Hi Radhakrishna,
On Wed, Mar 01, 2023 at 12:10:49PM -0800, Radhakrishna Sripada wrote:
> The commit 2357f2b271ad ("drm/i915/mtl: Initial display workarounds")
> extended the workaround Wa_16015201720 to MTL. However the registers
> that the original WA implemented moved for MTL.
>
> Implement the
On Wed, Mar 01, 2023 at 12:10:49PM -0800, Radhakrishna Sripada wrote:
> The commit 2357f2b271ad ("drm/i915/mtl: Initial display workarounds")
> extended the workaround Wa_16015201720 to MTL. However the registers
> that the original WA implemented moved for MTL.
>
> Implement the workaround with t
The commit 2357f2b271ad ("drm/i915/mtl: Initial display workarounds")
extended the workaround Wa_16015201720 to MTL. However the registers
that the original WA implemented moved for MTL.
Implement the workaround with the correct register.
v3: Skip clock gating for pipe C, D DMC's and fix the titl
