Re: [Intel-gfx] [PATCH v3 10/12] drm/i915/gen9: Turn DC handling into a power well

2015-11-16 Thread Patrik Jakobsson
On Mon, Nov 16, 2015 at 8:28 PM, Imre Deak wrote: > On ma, 2015-11-16 at 15:01 +0100, Patrik Jakobsson wrote: >> Handle DC off as a power well where enabling the power well will prevent >> the DMC to enter selected DC states (required around modesets and Aux >> A). Disabling the power well will al

Re: [Intel-gfx] [PATCH v3 10/12] drm/i915/gen9: Turn DC handling into a power well

2015-11-16 Thread Imre Deak
On ma, 2015-11-16 at 15:01 +0100, Patrik Jakobsson wrote: > Handle DC off as a power well where enabling the power well will prevent > the DMC to enter selected DC states (required around modesets and Aux > A). Disabling the power well will allow DC states again. For now the > highest DC state is D

Re: [Intel-gfx] [PATCH v3 10/12] drm/i915/gen9: Turn DC handling into a power well

2015-11-16 Thread Patrik Jakobsson
On Mon, Nov 16, 2015 at 03:01:07PM +0100, Patrik Jakobsson wrote: > Handle DC off as a power well where enabling the power well will prevent > the DMC to enter selected DC states (required around modesets and Aux > A). Disabling the power well will allow DC states again. For now the > highest DC st

[Intel-gfx] [PATCH v3 10/12] drm/i915/gen9: Turn DC handling into a power well

2015-11-16 Thread Patrik Jakobsson
Handle DC off as a power well where enabling the power well will prevent the DMC to enter selected DC states (required around modesets and Aux A). Disabling the power well will allow DC states again. For now the highest DC state is DC6 for Skylake and DC5 for Broxton but will be configurable for Sk