[Intel-gfx] [PATCH v3 2/3] drm/i915/vlv: WA for Turbo and RC6 to work together.

2014-03-13 Thread deepak . s
From: Deepak S deepa...@intel.com With RC6 enabled, BYT has an HW issue in determining the right Gfx busyness. WA for Turbo + RC6: Use SW based Gfx busy-ness detection to decide on increasing/decreasing the freq. This logic will monitor C0 counters of render/media power-wells over EI period and

Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/vlv: WA for Turbo and RC6 to work together.

2014-03-13 Thread Ville Syrjälä
On Thu, Mar 13, 2014 at 09:30:17PM +0530, deepa...@linux.intel.com wrote: From: Deepak S deepa...@intel.com With RC6 enabled, BYT has an HW issue in determining the right Gfx busyness. WA for Turbo + RC6: Use SW based Gfx busy-ness detection to decide on increasing/decreasing the freq. This

Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/vlv: WA for Turbo and RC6 to work together.

2014-03-13 Thread S, Deepak
On 3/13/2014 11:47 PM, Ville Syrjälä wrote: On Thu, Mar 13, 2014 at 09:30:17PM +0530, deepa...@linux.intel.com wrote: From: Deepak S deepa...@intel.com With RC6 enabled, BYT has an HW issue in determining the right Gfx busyness. WA for Turbo + RC6: Use SW based Gfx busy-ness detection to

Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/vlv: WA for Turbo and RC6 to work together.

2014-03-13 Thread Ville Syrjälä
On Fri, Mar 14, 2014 at 12:10:45AM +0530, S, Deepak wrote: On 3/13/2014 11:47 PM, Ville Syrjälä wrote: On Thu, Mar 13, 2014 at 09:30:17PM +0530, deepa...@linux.intel.com wrote: snip @@ -5019,13 +5026,17 @@ enum punit_power_well { #define GEN6_GT_GFX_RC6_LOCKED