On Wed, 28 Sep 2016, Manasi Navare wrote:
> On Wed, Sep 28, 2016 at 10:38:37AM +0300, Jani Nikula wrote:
>> On Wed, 28 Sep 2016, Manasi Navare wrote:
>> > On Mon, Sep 26, 2016 at 04:41:27PM +0300, Jani Nikula wrote:
>> >> On Fri, 16 Sep 2016, Manasi Navare wrote:
>> >> > While configuring the pi
On Wed, Sep 28, 2016 at 10:14:45AM +0300, Jani Nikula wrote:
> On Wed, 28 Sep 2016, Manasi Navare wrote:
> > On Tue, Sep 27, 2016 at 04:39:38PM +0300, Jani Nikula wrote:
> >> On Mon, 26 Sep 2016, Jani Nikula wrote:
> >> > On Fri, 16 Sep 2016, Manasi Navare wrote:
> >> >> While configuring the pi
On Wed, Sep 28, 2016 at 10:38:37AM +0300, Jani Nikula wrote:
> On Wed, 28 Sep 2016, Manasi Navare wrote:
> > On Mon, Sep 26, 2016 at 04:41:27PM +0300, Jani Nikula wrote:
> >> On Fri, 16 Sep 2016, Manasi Navare wrote:
> >> > While configuring the pipe during modeset, it should use
> >> > max clock
On Wed, 28 Sep 2016, Manasi Navare wrote:
> On Mon, Sep 26, 2016 at 04:41:27PM +0300, Jani Nikula wrote:
>> On Fri, 16 Sep 2016, Manasi Navare wrote:
>> > While configuring the pipe during modeset, it should use
>> > max clock and max lane count and reduce the bpp until
>> > the requested mode ra
On Wed, 28 Sep 2016, Manasi Navare wrote:
> On Tue, Sep 27, 2016 at 04:39:38PM +0300, Jani Nikula wrote:
>> On Mon, 26 Sep 2016, Jani Nikula wrote:
>> > On Fri, 16 Sep 2016, Manasi Navare wrote:
>> >> While configuring the pipe during modeset, it should use
>> >> max clock and max lane count and
On Tue, Sep 27, 2016 at 04:39:38PM +0300, Jani Nikula wrote:
> On Mon, 26 Sep 2016, Jani Nikula wrote:
> > On Fri, 16 Sep 2016, Manasi Navare wrote:
> >> While configuring the pipe during modeset, it should use
> >> max clock and max lane count and reduce the bpp until
> >> the requested mode rat
On Mon, Sep 26, 2016 at 04:41:27PM +0300, Jani Nikula wrote:
> On Fri, 16 Sep 2016, Manasi Navare wrote:
> > While configuring the pipe during modeset, it should use
> > max clock and max lane count and reduce the bpp until
> > the requested mode rate is less than or equal to
> > available link BW
On Mon, 26 Sep 2016, Jani Nikula wrote:
> On Fri, 16 Sep 2016, Manasi Navare wrote:
>> While configuring the pipe during modeset, it should use
>> max clock and max lane count and reduce the bpp until
>> the requested mode rate is less than or equal to
>> available link BW.
>> This is required to
On Fri, 16 Sep 2016, Manasi Navare wrote:
> While configuring the pipe during modeset, it should use
> max clock and max lane count and reduce the bpp until
> the requested mode rate is less than or equal to
> available link BW.
> This is required to pass DP Compliance.
As I wrote in reply to pat
While configuring the pipe during modeset, it should use
max clock and max lane count and reduce the bpp until
the requested mode rate is less than or equal to
available link BW.
This is required to pass DP Compliance.
v3:
* Add Debug print if requested mode cannot be supported
during modeset (Dhi
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