On Mon, Sep 30, 2019 at 06:28:16PM +0300, Ville Syrjälä wrote:
> On Sun, Sep 22, 2019 at 10:08:05AM -0700, Manasi Navare wrote:
> > As per the display enable sequence, we need to follow the enable sequence
> > for slaves first with DP_TP_CTL set to Idle and configure the transcoder
> > port sync re
On Sun, Sep 22, 2019 at 10:08:05AM -0700, Manasi Navare wrote:
> As per the display enable sequence, we need to follow the enable sequence
> for slaves first with DP_TP_CTL set to Idle and configure the transcoder
> port sync register to select the corersponding master, then follow the
> enable seq
As per the display enable sequence, we need to follow the enable sequence
for slaves first with DP_TP_CTL set to Idle and configure the transcoder
port sync register to select the corersponding master, then follow the
enable sequence for master leaving DP_TP_CTL to idle.
At this point the transcode
