Op 16-09-2019 om 21:19 schreef Manasi Navare:
> On Fri, Sep 13, 2019 at 03:36:39PM +0200, Maarten Lankhorst wrote:
>> Hey,
>>
>> Op 29-07-2019 om 21:17 schreef Manasi Navare:
>>> Hi Ville,
>>>
>>> Thanks for your review, so do we want to merge this as is or
>>> do we need some function to reject th
On Fri, Sep 13, 2019 at 03:36:39PM +0200, Maarten Lankhorst wrote:
> Hey,
>
> Op 29-07-2019 om 21:17 schreef Manasi Navare:
> > Hi Ville,
> >
> > Thanks for your review, so do we want to merge this as is or
> > do we need some function to reject the 8K mode on ICL in
> > intel_dp_mode_valid()?
>
Hey,
Op 29-07-2019 om 21:17 schreef Manasi Navare:
> Hi Ville,
>
> Thanks for your review, so do we want to merge this as is or
> do we need some function to reject the 8K mode on ICL in
> intel_dp_mode_valid()?
>
> Manasi
I've pushed this series as-is because it blocks my bigjoiner work. We sho
Hi Ville,
Thanks for your review, so do we want to merge this as is or
do we need some function to reject the 8K mode on ICL in intel_dp_mode_valid()?
Manasi
On Fri, Jul 12, 2019 at 11:29:38PM +0300, Ville Syrjälä wrote:
> On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote:
> > On ICL
On Fri, Jul 12, 2019 at 01:22:13PM -0700, Manasi Navare wrote:
> On ICL+, the vertical limits for the transcoders are increased to 8192
> and horizontal limits are bumped to 16K so bump up
> limits in intel_mode_valid()
>
> v4:
> * Increase the hdisplay to 16K (Ville)
> v3:
> * Supported starting
On ICL+, the vertical limits for the transcoders are increased to 8192
and horizontal limits are bumped to 16K so bump up
limits in intel_mode_valid()
v4:
* Increase the hdisplay to 16K (Ville)
v3:
* Supported starting ICL (Ville)
* Use the higher limits from TRANS_VTOTAL register (Ville)
v2:
* Ch
