Re: [Intel-gfx] [PATCH v5 3/3] drm/i915/perf: introduce global sseu pinning

2020-03-16 Thread Lionel Landwerlin
On 16/03/2020 11:16, Tvrtko Ursulin wrote: On 13/03/2020 14:34, Lionel Landwerlin wrote: On Gen11 powergating half the execution units is a functional requirement when using the VME samplers. Not fullfilling this requirement can lead to hangs. This unfortunately plays fairly poorly with the

Re: [Intel-gfx] [PATCH v5 3/3] drm/i915/perf: introduce global sseu pinning

2020-03-16 Thread Tvrtko Ursulin
On 13/03/2020 14:34, Lionel Landwerlin wrote: On Gen11 powergating half the execution units is a functional requirement when using the VME samplers. Not fullfilling this requirement can lead to hangs. This unfortunately plays fairly poorly with the NOA requirements. NOA requires a stable

Re: [Intel-gfx] [PATCH v5 3/3] drm/i915/perf: introduce global sseu pinning

2020-03-14 Thread Lionel Landwerlin
On 13/03/2020 17:26, Tvrtko Ursulin wrote: On 13/03/2020 14:34, Lionel Landwerlin wrote: On Gen11 powergating half the execution units is a functional requirement when using the VME samplers. Not fullfilling this requirement can lead to hangs. This unfortunately plays fairly poorly with the

Re: [Intel-gfx] [PATCH v5 3/3] drm/i915/perf: introduce global sseu pinning

2020-03-13 Thread Tvrtko Ursulin
On 13/03/2020 14:34, Lionel Landwerlin wrote: On Gen11 powergating half the execution units is a functional requirement when using the VME samplers. Not fullfilling this requirement can lead to hangs. This unfortunately plays fairly poorly with the NOA requirements. NOA requires a stable

[Intel-gfx] [PATCH v5 3/3] drm/i915/perf: introduce global sseu pinning

2020-03-13 Thread Lionel Landwerlin
On Gen11 powergating half the execution units is a functional requirement when using the VME samplers. Not fullfilling this requirement can lead to hangs. This unfortunately plays fairly poorly with the NOA requirements. NOA requires a stable power configuration to maintain its configuration. As