From: Tvrtko Ursulin
It seems that the DMC likes to transition between the DC states a lot when
there are no connected displays (no active power domains) during command
submission.
This activity on DC states has a negative impact on the performance of the
chip with huge latencies observed in the
Quoting Tvrtko Ursulin (2017-12-05 13:28:54)
> From: Tvrtko Ursulin
>
> It seems that the DMC likes to transition between the DC states a lot when
> there are no connected displays (no active power domains) during command
> submission.
>
> This activity on DC states has a negative impact on the
On Tue, Dec 05, 2017 at 01:35:11PM +, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2017-12-05 13:28:54)
> > From: Tvrtko Ursulin
> >
> > It seems that the DMC likes to transition between the DC states a lot when
> > there are no connected displays (no active power domains) during command
> >