On 26/04/2016 14:20, Daniel Vetter wrote:
On Mon, Apr 25, 2016 at 10:54:27AM +0100, Chris Wilson wrote:
As each batch buffer completes, it raises an interrupt which wakes up
the scheduler. Note that it is possible for multiple buffers to
complete before the IRQ handler gets to run. Further, the
On Mon, Apr 25, 2016 at 10:54:27AM +0100, Chris Wilson wrote:
> > As each batch buffer completes, it raises an interrupt which wakes up
> > the scheduler. Note that it is possible for multiple buffers to
> > complete before the IRQ handler gets to run. Further, the seqno values
> > of the individua
On 25/04/2016 10:54, Chris Wilson wrote:
On Wed, Apr 20, 2016 at 06:13:18PM +0100, john.c.harri...@intel.com wrote:
From: John Harrison
Implemented a batch buffer submission scheduler for the i915 DRM driver.
The general theory of operation is that when batch buffers are
submitted to the driv
On Wed, Apr 20, 2016 at 06:13:18PM +0100, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> Implemented a batch buffer submission scheduler for the i915 DRM driver.
>
> The general theory of operation is that when batch buffers are
> submitted to the driver, the execbuffer() code assign
This patch series can be pulled from
'ssh://people.freedesktop.org/~johnharr/scheduler' as the 'scheduler'
branch.
On 20/04/2016 18:13, john.c.harri...@intel.com wrote:
From: John Harrison
Implemented a batch buffer submission scheduler for the i915 DRM driver.
The general theory of operat
From: John Harrison
Implemented a batch buffer submission scheduler for the i915 DRM driver.
The general theory of operation is that when batch buffers are
submitted to the driver, the execbuffer() code assigns a unique seqno
value and then packages up all the information required to execute the
