Re: [Intel-gfx] [v3 1/2] drm/i915/display/tgl: Disable FBC with PSR2

2020-12-01 Thread Shankar, Uma
> -Original Message- > From: Ville Syrjälä > Sent: Friday, November 27, 2020 8:16 PM > To: Souza, Jose > Cc: Shankar, Uma ; intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [v3 1/2] drm/i915/display/tgl: Disable FBC with PSR2 > > On Wed, Nov 25,

Re: [Intel-gfx] [v3 1/2] drm/i915/display/tgl: Disable FBC with PSR2

2020-11-27 Thread Ville Syrjälä
On Wed, Nov 25, 2020 at 05:52:10PM +, Souza, Jose wrote: > On Wed, 2020-11-25 at 18:17 +0200, Ville Syrjälä wrote: > > On Tue, Nov 24, 2020 at 10:03:35PM +, Souza, Jose wrote: > > > On Fri, 2020-11-20 at 01:06 +0530, Uma Shankar wrote: > > > > There are some corner cases wrt underrun when w

Re: [Intel-gfx] [v3 1/2] drm/i915/display/tgl: Disable FBC with PSR2

2020-11-25 Thread Souza, Jose
On Wed, 2020-11-25 at 18:17 +0200, Ville Syrjälä wrote: > On Tue, Nov 24, 2020 at 10:03:35PM +, Souza, Jose wrote: > > On Fri, 2020-11-20 at 01:06 +0530, Uma Shankar wrote: > > > There are some corner cases wrt underrun when we enable > > > FBC with PSR2 on TGL. Recommendation from hardware is

Re: [Intel-gfx] [v3 1/2] drm/i915/display/tgl: Disable FBC with PSR2

2020-11-25 Thread Ville Syrjälä
On Tue, Nov 24, 2020 at 10:03:35PM +, Souza, Jose wrote: > On Fri, 2020-11-20 at 01:06 +0530, Uma Shankar wrote: > > There are some corner cases wrt underrun when we enable > > FBC with PSR2 on TGL. Recommendation from hardware is to > > keep this combination disabled. > > > > Bspec: 50422 HSD

Re: [Intel-gfx] [v3 1/2] drm/i915/display/tgl: Disable FBC with PSR2

2020-11-24 Thread Souza, Jose
On Fri, 2020-11-20 at 01:06 +0530, Uma Shankar wrote: > There are some corner cases wrt underrun when we enable > FBC with PSR2 on TGL. Recommendation from hardware is to > keep this combination disabled. > > Bspec: 50422 HSD: 14010260002 > > v2: Added psr2 enabled check from crtc_state (Anshuman

Re: [Intel-gfx] [v3 1/2] drm/i915/display/tgl: Disable FBC with PSR2

2020-11-24 Thread Ville Syrjälä
On Fri, Nov 20, 2020 at 01:06:14AM +0530, Uma Shankar wrote: > There are some corner cases wrt underrun when we enable > FBC with PSR2 on TGL. Recommendation from hardware is to > keep this combination disabled. > > Bspec: 50422 HSD: 14010260002 > > v2: Added psr2 enabled check from crtc_state (A

[Intel-gfx] [v3 1/2] drm/i915/display/tgl: Disable FBC with PSR2

2020-11-19 Thread Uma Shankar
There are some corner cases wrt underrun when we enable FBC with PSR2 on TGL. Recommendation from hardware is to keep this combination disabled. Bspec: 50422 HSD: 14010260002 v2: Added psr2 enabled check from crtc_state (Anshuman) Added Bspec link and HSD referneces (Jose) v3: Moved the logic to