Re: [Intel-gfx] [v3 3/5] drm/i915: Get proper min cdclk if vDSC enabled

2021-09-08 Thread Jani Nikula
On Thu, 02 Sep 2021, Lee Shawn C wrote: > VDSC engine can process only 1 pixel per Cd clock. In case > VDSC is used and max slice count == 1, max supported pixel > clock should be 100% of CD clock. Then do min_cdclk and > pixel clock comparison to get proper min cdclk. > > v2: > - Check for dsc

[Intel-gfx] [v3 3/5] drm/i915: Get proper min cdclk if vDSC enabled

2021-09-02 Thread Lee Shawn C
VDSC engine can process only 1 pixel per Cd clock. In case VDSC is used and max slice count == 1, max supported pixel clock should be 100% of CD clock. Then do min_cdclk and pixel clock comparison to get proper min cdclk. v2: - Check for dsc enable and slice count ==1 then allow to double