Re: [Intel-gfx] [v6 3/4] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-06 Thread Srivatsa, Anusha
>-Original Message- >From: Navare, Manasi D >Sent: Tuesday, November 6, 2018 2:42 PM >To: Srivatsa, Anusha >Cc: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org; Singh, >Gaurav K ; Jani Nikula ; >Ville Syrjala >Subject: Re: [v6 3/4] i915/dp/fec: Configure the Forward

Re: [Intel-gfx] [v6 3/4] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-06 Thread Manasi Navare
On Mon, Nov 05, 2018 at 03:31:49PM -0800, Anusha Srivatsa wrote: > If FEC is supported, the corresponding > DP_TP_CTL register bits have to be configured. > > The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register > and wait till FEC_STATUS in DP_TP_CTL[28] is 1. > Also add the warn

[Intel-gfx] [v6 3/4] i915/dp/fec: Configure the Forward Error Correction bits.

2018-11-05 Thread Anusha Srivatsa
If FEC is supported, the corresponding DP_TP_CTL register bits have to be configured. The driver has to program the FEC_ENABLE in DP_TP_CTL[30] register and wait till FEC_STATUS in DP_TP_CTL[28] is 1. Also add the warn message to make sure that the control register is already active while