From: Ville Syrjälä <ville.syrj...@linux.intel.com>

0x108100 and 0x1080c0 have been around since snb. Rename the
defines appropriately.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c  | 4 ++--
 drivers/gpu/drm/i915/gt/intel_ggtt.c        | 2 +-
 drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +-
 drivers/gpu/drm/i915/i915_reg.h             | 7 ++++---
 4 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c 
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 252fe5cd6ede..6185a5f73a48 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -935,7 +935,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, 
u16 type,
                GEM_BUG_ON((dsm_base + dsm_size) > lmem_size);
        } else {
                /* Use DSM base address instead for stolen memory */
-               dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE) & 
GEN12_BDSM_MASK;
+               dsm_base = intel_uncore_read64(uncore, GEN6_DSMBASE) & 
GEN11_BDSM_MASK;
                if (WARN_ON(lmem_size < dsm_base))
                        return ERR_PTR(-ENODEV);
                dsm_size = ALIGN_DOWN(lmem_size - dsm_base, SZ_1M);
@@ -948,7 +948,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, 
u16 type,
                 * Normally this would not work but on MTL the system firmware
                 * should have relaxed the access permissions sufficiently.
                 */
-               io_start = intel_uncore_read64(uncore, GEN12_DSMBASE) & 
GEN12_BDSM_MASK;
+               io_start = intel_uncore_read64(uncore, GEN6_DSMBASE) & 
GEN11_BDSM_MASK;
                io_size = dsm_size;
        } else if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) {
                io_start = 0;
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c 
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index ab71d74ec426..05c5525e7e2d 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1167,7 +1167,7 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 
size)
         * should have relaxed the access permissions sufficiently.
         */
        if (IS_METEORLAKE(i915))
-               phys_addr = intel_uncore_read64(uncore, GEN12_GSMBASE) & 
GEN12_BDSM_MASK;
+               phys_addr = intel_uncore_read64(uncore, GEN6_GSMBASE) & 
GEN11_BDSM_MASK;
        else
                phys_addr = pci_resource_start(pdev, GEN4_GTTMMADR_BAR) + 
gen6_gttadr_offset(i915);
 
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c 
b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index af357089da6e..51bb27e10a4f 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -240,7 +240,7 @@ static struct intel_memory_region *setup_lmem(struct 
intel_gt *gt)
                lmem_size -= tile_stolen;
        } else {
                /* Stolen starts from GSMBASE without CCS */
-               lmem_size = intel_uncore_read64(&i915->uncore, GEN12_GSMBASE);
+               lmem_size = intel_uncore_read64(&i915->uncore, GEN6_GSMBASE);
        }
 
        i915_resize_lmem_bar(i915, lmem_size);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 27dc903f0553..b54d62952a53 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6314,9 +6314,10 @@ enum skl_power_gate {
 #define   GMS_MASK                     REG_GENMASK(15, 8)
 #define   GGMS_MASK                    REG_GENMASK(7, 6)
 
-#define GEN12_GSMBASE                  _MMIO(0x108100)
-#define GEN12_DSMBASE                  _MMIO(0x1080C0)
-#define   GEN12_BDSM_MASK              REG_GENMASK64(63, 20)
+#define GEN6_GSMBASE                   _MMIO(0x108100)
+#define GEN6_DSMBASE                   _MMIO(0x1080C0)
+#define   GEN6_BDSM_MASK               REG_GENMASK64(31, 20)
+#define   GEN11_BDSM_MASK              REG_GENMASK64(63, 20)
 
 #define XEHP_CLOCK_GATE_DIS            _MMIO(0x101014)
 #define   SGSI_SIDECLK_DIS             REG_BIT(17)
-- 
2.41.0

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