On Wed, 03 Apr 2024, Balasubramani Vivekanandan
wrote:
> Xe2_HPD has different address for C20 PLL registers. Enable the support
> to use the right PLL register address based on display version.
>
> Note that Xe2_LPD uses the same C20 SRAM offsets used by Xe_LPDP (i.e.
> MTL's display). According
Xe2_HPD has different address for C20 PLL registers. Enable the support
to use the right PLL register address based on display version.
Note that Xe2_LPD uses the same C20 SRAM offsets used by Xe_LPDP (i.e.
MTL's display). According to the BSpec, currently, only Xe2_HPD has
different offsets, so m
