[Intel-gfx] [PATCH i-g-t 1/3] lib/igt_kms: Add support for 4K and audio HDMI EDID injection.

Signed-off-by: Marius Vlad --- lib/igt_kms.c | 181 ++ lib/igt_kms.h | 2 + 2 files changed, 183 insertions(+) diff --git a/lib/igt_kms.c b/lib/igt_kms.c index 90c8da7..ed40c48 100644 --- a/lib/igt_kms.c +++

Re: [Intel-gfx] [PATCH i-g-t] list-workarounds: Fix python 2 print statement

Oops, sorry for the error. Thanks for fixing it. Sameer > -Original Message- > From: Lespiau, Damien > Sent: Monday, February 08, 2016 4:08 AM > To: intel-gfx@lists.freedesktop.org > Cc: Kibey, Sameer; Dylan Baker > Subject: [PATCH i-g-t] list-workarounds: Fix python 2 print statement >

[Intel-gfx] [PATCH i-g-t 3/3] lib/igt_kms: Remove check against HDMI connectors on HSW and BDW.

Signed-off-by: Marius Vlad --- lib/igt_kms.c | 10 +- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/lib/igt_kms.c b/lib/igt_kms.c index ed40c48..5c911d5 100644 --- a/lib/igt_kms.c +++ b/lib/igt_kms.c @@ -384,16 +384,8 @@ bool

[Intel-gfx] [PATCH i-g-t v2 0/3] 4K and audio HDMI EDID injection

This series adds a test for HDMI injection (4K and audio), and it needs https://patchwork.freedesktop.org/series/3007/. v2: Use a proper subject. Added speaker data block and check that we get indeed a valid ELD for audio injection, otherwise we can not tell if the audio injection succeeded.

[Intel-gfx] [PATCH i-g-t 2/3] tests/kms_hdmi_inject: Test to make use of HDMI injection capabilities.

Signed-off-by: Marius Vlad --- tests/Makefile.sources | 1 + tests/kms_hdmi_inject.c | 236 2 files changed, 237 insertions(+) create mode 100644 tests/kms_hdmi_inject.c diff --git a/tests/Makefile.sources

[Intel-gfx] [PATCH] drm/i915: restrict PP save/restore to platforms with lvds

eDP already restores PP state completely on it's own, we only need this code for LVDS. Since it's more work to move this into the lvds encoder properly just limit it to affected pch chips for now (ibx/ppt). Cc: Jani Nikula Acked-by: Jani Nikula

Re: [Intel-gfx] [RFC 02/29] drm/i915: Introduce host graphics memory balloon for gvt

On pe, 2016-02-05 at 22:16 +0800, Zhiyuan Lv wrote: > Hi Joonas, > > On Fri, Feb 05, 2016 at 03:40:49PM +0200, Joonas Lahtinen wrote: > > Hi, > > > > On pe, 2016-02-05 at 18:03 +0800, Zhiyuan Lv wrote: > > > Hi Joonas, > > > > > > Thanks much for the review! We will incorporate those review

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reject invalid-pad for context-destroy and -create ioctls

== Summary == Series 3128v1 drm/i915: Reject invalid-pad for context-destroy and -create ioctls http://patchwork.freedesktop.org/api/1.0/series/3128/revisions/1/mbox/ Test kms_force_connector_basic: Subgroup force-edid: skip -> PASS (snb-x220t) bdw-nuci7

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Reject invalid-pad for context-destroy and -create ioctls

== Summary == Series 3128v1 drm/i915: Reject invalid-pad for context-destroy and -create ioctls http://patchwork.freedesktop.org/api/1.0/series/3128/revisions/1/mbox/ Test kms_force_connector_basic: Subgroup force-edid: skip -> PASS (snb-x220t) bdw-nuci7

[Intel-gfx] [PULL] topic/drm-misc

Hi Dave, First drm-misc pull req for 4.6. Big one is the drm_event cleanup, which is also prep work for adding android fence support to kms (Gustavo is planning to do that). Otherwise random small bits all over. Cheers, Daniel The following changes since commit

Re: [Intel-gfx] [PATCH v8 1/1] drm/i915/bxt: Check BIOS RC6 setup before enabling RC6

On Fri, 05 Feb 2016, Imre Deak wrote: > On la, 2016-02-06 at 00:13 +0530, Sagar Arun Kamble wrote: >> RC6 setup is shared between BIOS and Driver. BIOS sets up subset of >> RC6 >> setup registers. If those are not setup Driver should not enable RC6. >> For implementing this,

Re: [Intel-gfx] [Mesa-dev] [PATCH v2 i-g-t] igt/list-workarounds: Extend the script to Mesa

On Fri, Feb 05, 2016 at 04:12:08PM -0800, Dylan Baker wrote: > > > parse(work_arounds) > > > + print "\nList of workarounds found in %s:" % project > > Hey Damien, the script says it's python 3, and this ^^^ is broken syntax > in python 3 (but not in 2). :( I did notice the python2

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Add Backlight Control using DPCD for eDP connectors (v6)

On 2/5/2016 5:48 PM, Yetunde Adebisi wrote: This patch adds support for eDP backlight control using DPCD registers to backlight hooks in intel_panel. It checks for backlight control over AUX channel capability and sets up function pointers to get and set the backlight brightness level if

Re: [Intel-gfx] [PATCH v1 1/1] drm/i915: Hold RPM reference while setting freq limits through sysfs

On Fri, 05 Feb 2016, Sagar Arun Kamble wrote: > Signed-off-by: Sagar Arun Kamble Please add a commit message saying why, and what blows up without this. It may be obvious to you, but there's no harm in spelling it out. BR, Jani. > --- >

[Intel-gfx] [PULL] drm-intel-next

Hi Dave, Back from lca, time to start the 4.6 release train! I'll follow up with some drm-misc pull, too. drm-intel-next-2016-01-24: - support for v3 vbt dsi blocks (Jani) - improve mmio debug checks (Mika Kuoppala) - reorg the ddi port translation table entries and related code (Ville) - reorg

Re: [Intel-gfx] [PATCH v3] drm/i915/execlists: Move WA_TAIL_DWORDS to callee

On 06/02/16 09:33, Chris Wilson wrote: On Fri, Feb 05, 2016 at 02:56:51PM -0800, Rodrigo Vivi wrote: On Fri, Feb 5, 2016 at 11:31 AM, Dave Gordon wrote: @@ -907,7 +927,8 @@ int intel_logical_ring_reserve_space(struct drm_i915_gem_request *request) * adding

Re: [Intel-gfx] [PATCH v3] drm/i915/execlists: Move WA_TAIL_DWORDS to callee

On 05/02/16 22:56, Rodrigo Vivi wrote: On Fri, Feb 5, 2016 at 11:31 AM, Dave Gordon wrote: From: Chris Wilson Currently emit-request starts writing to the ring and reserves space for a workaround to be emitted later whilst submitting the

[Intel-gfx] [PATCH i-g-t] list-workarounds: Fix python 2 print statement

That script is a python 3 script, so we can't use the python 2 print statement, it's a function now. I missed it in the review because reviewing a diff without additional context gives you a partial story. Cc: Sameer Kibey Cc: Dylan Baker

Re: [Intel-gfx] [RFC 00/22] Add support for GuC-based SLPC

Hi Paulo, Thanks for comments. 1. Will make change related to #define for number of pipes and remove the unnecessary ones. 2. vrefresh is almost same as "clock/(htotal*vtotal) if we round up later. Will keep it vrefresh for now. Thanks Sagar On 2/4/2016 1:55 AM, Zanoni, Paulo R wrote: Em

Re: [Intel-gfx] [PATCH] drm/i915: Skip DDI PLL selection for DSI

On 2/5/2016 4:59 PM, Mika Kahola wrote: Skip DDI PLL selection if display type is DSI/MIPI. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_display.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git

Re: [Intel-gfx] [v2 2/6] drm/i915/skl+: calculate ddb minimum allocation

On 02/05/2016 07:59 PM, Matt Roper wrote: On Wed, Jan 27, 2016 at 09:39:59PM +0530, Shobhit Kumar wrote: From: "Kumar, Mahesh" don't always use 8 ddb as minimum, instead calculate using proper algorithm. v2: optimizations as per Matt's comments. Cc:

Re: [Intel-gfx] [PATCH] drm/i915: restrict PP save/restore to platforms with lvds

On 2/8/2016 3:25 PM, Daniel Vetter wrote: eDP already restores PP state completely on it's own, we only need this code for LVDS. Since it's more work to move this into the lvds encoder properly just limit it to affected pch chips for now (ibx/ppt). Cc: Jani Nikula

Re: [Intel-gfx] [PATCH] drm/i915: Skip DDI PLL selection for DSI

On Tue, 09 Feb 2016, "Thulasimani, Sivakumar" wrote: > On 2/5/2016 4:59 PM, Mika Kahola wrote: >> Skip DDI PLL selection if display type is DSI/MIPI. >> >> Signed-off-by: Mika Kahola >> --- >> drivers/gpu/drm/i915/intel_display.c | 9

[Intel-gfx] ✓ Fi.CI.BAT: success for Add HuC loading and authentication support

== Summary == Series 3188v1 Add HuC loading and authentication support http://patchwork.freedesktop.org/api/1.0/series/3188/revisions/1/mbox/ Test kms_flip: Subgroup basic-flip-vs-dpms: skip -> PASS (bsw-nuc-2) dmesg-warn -> PASS

Re: [Intel-gfx] [PATCH] drm/i915: Skip DDI PLL selection for DSI

On 2/9/2016 12:02 PM, Jani Nikula wrote: On Tue, 09 Feb 2016, "Thulasimani, Sivakumar" wrote: On 2/5/2016 4:59 PM, Mika Kahola wrote: Skip DDI PLL selection if display type is DSI/MIPI. Signed-off-by: Mika Kahola ---

Re: [Intel-gfx] [PATCH] drm/i915: restrict PP save/restore to platforms with lvds

On 2/9/2016 11:54 AM, Jani Nikula wrote: On Tue, 09 Feb 2016, "Thulasimani, Sivakumar" wrote: On 2/8/2016 3:25 PM, Daniel Vetter wrote: eDP already restores PP state completely on it's own, we only need this code for LVDS. Since it's more work to move this

Re: [Intel-gfx] [PATCH] drm/i915: restrict PP save/restore to platforms with lvds

On Tue, 09 Feb 2016, "Thulasimani, Sivakumar" wrote: > On 2/8/2016 3:25 PM, Daniel Vetter wrote: >> eDP already restores PP state completely on it's own, we only need >> this code for LVDS. Since it's more work to move this into the lvds >> encoder properly just

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Check for get_pages instead of shmem (filp)

== Summary == Series 3145v1 drm/i915: Check for get_pages instead of shmem (filp) http://patchwork.freedesktop.org/api/1.0/series/3145/revisions/1/mbox/ bdw-nuci7total:161 pass:152 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:164 pass:152 dwarn:0 dfail:0 fail:0

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Move WA_TAIL_DWORDS to callee

== Summary == Series 3133v1 drm/i915/execlists: Move WA_TAIL_DWORDS to callee http://patchwork.freedesktop.org/api/1.0/series/3133/revisions/1/mbox/ bdw-nuci7total:161 pass:152 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:164 pass:152 dwarn:0 dfail:0 fail:0

[Intel-gfx] [PATCH i-g-t] Use uint64_t in eviction memory subtest parameters

With large apertures we need to use uint64_t for counts and sizes. commit 0e2071411a4d4e1488a821daf522dffde2809e03 paved way for this but forgot to change the subtest parameters. References: https://bugs.freedesktop.org/show_bug.cgi?id=93849 Cc: Chris Wilson

[Intel-gfx] ✓ Fi.CI.BAT: success for A collection of cleanups, revisited

== Summary == Series 3129v1 A collection of cleanups, revisited http://patchwork.freedesktop.org/api/1.0/series/3129/revisions/1/mbox/ bdw-nuci7total:161 pass:152 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:164 pass:152 dwarn:0 dfail:0 fail:0 skip:12

Re: [Intel-gfx] [PATCH v3] drm/i915/skl: Add missing SKL ids

Michał Winiarski writes: > Used by production devices: > Intel(R) Iris Graphics 540 (Skylake GT3e) > Intel(R) Iris Graphics 550 (Skylake GT3e) > > v2: More ids > v3: Less ids (GT1 got duplicated) > > Cc: Mika Kuoppala > Signed-off-by:

Re: [Intel-gfx] [PATCH v8 1/1] drm/i915/bxt: Check BIOS RC6 setup before enabling RC6

On Mon, 08 Feb 2016, Imre Deak wrote: >> > Thanks for the patch, I pushed it to -dinq. >> >> The rule is, we should wait for the CI results before pushing. > > Yes, I forgot to wait for the result for this version of the patch, > thanks for pointing it out. As a side-note

Re: [Intel-gfx] [PATCH v1 1/1] drm/i915: Hold RPM reference while setting freq limits through sysfs

On Sat, Feb 06, 2016 at 12:25:01AM +0530, Sagar Arun Kamble wrote: > Signed-off-by: Sagar Arun Kamble > --- > drivers/gpu/drm/i915/i915_sysfs.c | 8 > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c >

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v1,1/1] drm/i915: Hold RPM reference while setting freq limits through sysfs

== Summary == Series 3131v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/3131/revisions/1/mbox/ bdw-nuci7total:161 pass:152 dwarn:0 dfail:0 fail:0 skip:9 bdw-ultratotal:164 pass:152 dwarn:0 dfail:0 fail:0 skip:12 bsw-nuc-2

Re: [Intel-gfx] [PATCH v8 1/1] drm/i915/bxt: Check BIOS RC6 setup before enabling RC6

On ma, 2016-02-08 at 11:19 +0200, Jani Nikula wrote: > On Fri, 05 Feb 2016, Imre Deak wrote: > > On la, 2016-02-06 at 00:13 +0530, Sagar Arun Kamble wrote: > > > RC6 setup is shared between BIOS and Driver. BIOS sets up subset > > > of > > > RC6 > > > setup registers. If

Re: [Intel-gfx] [PATCH v5 00/12] Enable GPU switching on pre-retina MacBook Pro

On Mon, Jan 11, 2016 at 08:09:20PM +0100, Lukas Wunner wrote: > Enable GPU switching on the pre-retina MacBook Pro (2008 - 2013), v5. > > The main obstacle on these machines is that the panel mode in VBIOS > is bogus. Fortunately gmux can switch DDC independently from the > display, thereby

[Intel-gfx] [PATCH i-g-t v2] tests/kms_pipe_crc_basic: Don't suspend the machine if the pipe is not present.

suspend-read-crc-pipe will perform a suspend and then skip the test in case the pipe is not present or is fused w/ another pipe. Skip the test before doing the suspend. v2: Somehow the subject was trimmed. Signed-off-by: Marius Vlad --- tests/kms_pipe_crc_basic.c |

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/1] drm/i915: Hold RPM reference while setting freq limits through sysfs (rev2)

== Summary == Series 3131v2 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/3131/revisions/2/mbox/ Test kms_flip: Subgroup basic-flip-vs-dpms: skip -> PASS (bsw-nuc-2) dmesg-warn -> PASS (ilk-hp8440p) UNSTABLE

[Intel-gfx] [PATCH v2 1/1] drm/i915: Hold RPM reference while setting freq limits through sysfs

This changes ensures device is active when frequency limits are changed. This is needed as we are writing to register RPNSWREQ in intel_set_rps. If not done, might lead to undesired errors like: [ 1965.189137] [drm:fw_domains_get] *ERROR* blitter: timed out waiting for forcewake ack to clear.

Re: [Intel-gfx] [PATCH v2 1/1] drm/i915: Hold RPM reference while setting freq limits through sysfs

On Mon, Feb 08, 2016 at 10:47:11PM +0530, Sagar Arun Kamble wrote: > This changes ensures device is active when frequency limits are changed. > This is needed as we are writing to register RPNSWREQ in intel_set_rps. > If not done, might lead to undesired errors like: > [ 1965.189137]

[Intel-gfx] [PATCH i-g-t] lib/ioctl_wrappers: Separate ring BSD1 from BSD2 checks

Some platforms have ring BSD available but no BSD2. Because of the current verification, tests involving ring BSD1 will be skipped if no BSD2 is available. Decoupling the checks will allow running the BSD1 specific tests on these platforms. Signed-off-by: Gabriel Feceoru

[Intel-gfx] [PATCH] drm/i915: Pretend cursor is always on for ILK-style WM calculations (v2)

Due to our lack of two-step watermark programming, our driver has historically pretended that the cursor plane is always on for the purpose of watermark calculations; this helps avoid serious flickering when the cursor turns off/on (e.g., when the user moves the mouse pointer to a different

Re: [Intel-gfx] [PATCH] drm/i915: Check for get_pages instead of shmem (filp)

On Fri, Feb 5, 2016 at 5:48 PM, Ben Widawsky wrote: > This behavior of checking for a shmem backed GEM object was introduced here: > commit 4c914c0c7c787b8f730128a8cdcca9c50b0784ab > Author: Brad Volkin > Date: Tue Feb 18 10:15:45 2014

Re: [Intel-gfx] [PATCH] drm/i915: Check for get_pages instead of shmem (filp)

Applied to a 4.4.1 tree: Tested-by: Jordan Justen And, FWIW: Reviewed-by: Jordan Justen On 2016-02-05 17:48:37, Ben Widawsky wrote: > This behavior of checking for a shmem backed GEM object was introduced here: > commit

[Intel-gfx] [PATCH v2 3/6] drm/i915/huc: Unified css_header struct for GuC and HuC

From: Alex Dai HuC firmware css header has almost exactly same definition as GuC firmware except for the sw_version. Also, add a new member fw_type into intel_uc_fw to indicate what kind of fw it is. So, the loader will pull right sw_version from header. Signed-off-by: Alex

[Intel-gfx] [PATCH v2 0/6] Add HuC loading and authentication support

From: Alex Dai The current GuC loading helper functions have been utilized for HuC loading too. The firmware css_header is unified for GuC and HuC. Be note that driver init won't fail even HuC loading fails. v2: Rebase to latest kernel. Alex Dai (6): drm/i915/guc: Make the

[Intel-gfx] [PATCH v2 1/6] drm/i915/guc: Make the GuC fw loading helper functions general

From: Alex Dai Rename some of the GuC fw loading code to make them more general. We will utilize them for HuC loading as well. s/intel_guc_fw/intel_uc_fw/g s/GUC_FIRMWARE/UC_FIRMWARE/g Struct intel_guc_fw is renamed to intel_uc_fw. Prefix of tts members, such as 'guc'

[Intel-gfx] [PATCH v2 5/6] drm/i915/huc: Add debugfs for HuC loading status check

From: Alex Dai Add debugfs entry for HuC loading status check. Signed-off-by: Alex Dai Signed-off-by: Peter Antoine --- drivers/gpu/drm/i915/i915_debugfs.c | 32 1 file changed, 32 insertions(+)

[Intel-gfx] [PATCH v2 2/6] drm/i915/guc: Bypass fw loading gracefully if GuC is not supported

From: Alex Dai This is to rework previous patch: commit 9f9e539f90bcecfdc7b3679d337b7a62d4313205 Author: Daniel Vetter Date: Fri Oct 23 11:10:59 2015 +0200 drm/i915: Shut up GuC errors when it's disabled There is the case where GuC loading is

[Intel-gfx] [PATCH v2 4/6] drm/i915/huc: Add HuC fw loading support

From: Alex Dai The HuC loading process is similar to GuC. The intel_uc_fw_fetch() is used for both cases. HuC loading needs to be before GuC loading. The WOPCM setting must be done early before loading any of them. Signed-off-by: Alex Dai Signed-off-by:

[Intel-gfx] [PATCH v2 6/6] drm/i915/huc: Support HuC authentication

From: Alex Dai The HuC authentication is done by host2guc call. The HuC RSA keys are sent to GuC for authentication. Signed-off-by: Alex Dai Signed-off-by: Peter Antoine --- drivers/gpu/drm/i915/i915_guc_submission.c | 65